This invention particularly relates to an operation mode setting apparatus on a single chip microprocessor.
Due to the recent progress of semiconductor technique, the so-called single chip microprocessor has been developed which includes all of a microprocessor unit (MPU), RAM, ROM, and so forth in the same chip. This type of microprocessor comprises not only RAM, and ROM, but also external connection pins which are used as input-output (I/O) ports and also as bus connection terminals, and mode-setting circuits which can select any desired operation mode in order to effect, for example, the function of applying external RAM and ROM to increase total memory capacity. In this case, about eight operation modes are generally required to control the operation of the chip, for example one function being the test of the chip.
These eight operation modes are normally classified into two groups according to whether an internal or external memory is accessed. An internal or external (I/E) pin applied in an example of this invention is based on this classification. Hitherto, three external connection pins have been used to select any desired one of the above-mentioned eight operation modes. When a microprocessor is accessing externally, set mode data is supplied to the chip through the above-mentioned three external connection pins. If the three pins are used exclusively to set an operation mode, a noticeable waste of external pins occurs, thereby considerably reducing the function of the chip. At present, other function pins are used concurrently with the external connection pins.
However, when the conventional single chip microprocessor, constructed as described above, is mounted on an operation board, it is necessary to provide many complicated external circuits around the aforementioned external connection pins. As a result, the conventional single chip microprocessor has deficiencies in that a large number of circuit elements have to be provided for the mounting of the chip, and further problems are raised in respect of, for example, the chip-fitting cost and the noise susceptibility.
In the prior art, n-number (n.gtoreq.1) of external connection pins are used to select one of 2.sup.n operation modes, resulting in the waste of pins.